Résumé:
To enable the advancement of Si based technology, necessary to increase computing
power and the manufacture of more compact circuits, significant changes to the current MOS
multi-gate transistor device are a necessity. Novel transistor architectures and materials are
currently being researched vigorously. This thesis, on the electrical characterisation of multigate
transistors displays detailed insight into the carrier transport and resulting performance
limiting mechanisms. The results are composed of many parts. The impact of variations of
the gate length, gate dielectric material, fin parameter, gate work function, doping
concentration, and temperature on device characteristics are studied using ATLAS Silvaco
device simulator. Simulation results for various gate lengths are reported and analyzed. As
the quantum effects are pronounced in nanoscale devices, we have included these effects in
our study and simulation. We have then compared the achieved results to classical
simulations to assess their performance limits. Finally, a comparison of our results with
recently published data is presented to confirm our study.
